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A Speed-Up Technique for an Auto-Memoization Processor by Reusing Partial Results of Instruction Regions
https://nitech.repo.nii.ac.jp/records/4651
https://nitech.repo.nii.ac.jp/records/465193b83243-61c4-4448-97e7-54528f242653
名前 / ファイル | ライセンス | アクション |
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本文_fulltext (1.7 MB)
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(c)2012 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
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Item type | 会議発表論文 / Conference Paper(1) | |||||
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公開日 | 2015-04-28 | |||||
タイトル | ||||||
言語 | en | |||||
タイトル | A Speed-Up Technique for an Auto-Memoization Processor by Reusing Partial Results of Instruction Regions | |||||
言語 | ||||||
言語 | eng | |||||
資源タイプ | ||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_5794 | |||||
資源タイプ | conference paper | |||||
著者 |
Kamimura, Kazutaka
× Kamimura, Kazutaka× Oda, Ryosuke× Yamada, Tatsuhiro× Tsumura, Tomoaki× Matsuo, Hiroshi× Nakashima, Yasuhiko |
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著者別名 | ||||||
姓名 | 津邑, 公暁 | |||||
著者別名 | ||||||
姓名 | 松尾, 啓志 | |||||
書誌情報 |
Proc. 3rd Int'l. Conf. on Networking and Computing (ICNC'12) p. 49-57, 発行日 2012-12 |
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出版者 | ||||||
出版者 | Institute of Electrical and Electronics Engineers | |||||
ISBN | ||||||
識別子タイプ | ISBN | |||||
関連識別子 | 9781467346245 | |||||
著者版フラグ | ||||||
出版タイプ | AM | |||||
出版タイプResource | http://purl.org/coar/version/c_ab4af688f83e57aa | |||||
DOI | ||||||
関連タイプ | isVersionOf | |||||
識別子タイプ | DOI | |||||
関連識別子 | http://dx.doi.org/10.1109/ICNC.2012.17 | |||||
関連名称 | 10.1109/ICNC.2012.17 | |||||
内容記述 | ||||||
内容記述タイプ | Other | |||||
内容記述 | Okinawa, Japan, 5-7 December 2012 | |||||
フォーマット | ||||||
内容記述タイプ | Other | |||||
内容記述 | application/pdf |