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Characteristics of SiO2/n-GaN interfaces with β-Ga2O3 interlayers
https://nitech.repo.nii.ac.jp/records/5171
https://nitech.repo.nii.ac.jp/records/5171261dfca7-ad94-4e4c-9d8c-e7a9e9e56dcc
名前 / ファイル | ライセンス | アクション |
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本文_fulltext (173.1 kB)
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Copyright (2003) American Institute of Physics. This article may be downloaded for personal use only. Any other use requires prior permission of the author and the American Institute of Physics.The following article appeared in Applied physics letters, 83(21),pp.4336-4338; 2003 and may be found at http://link.aip.org/link/?apl/83/4336
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Item type | 学術雑誌論文 / Journal Article(1) | |||||
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公開日 | 2012-11-06 | |||||
タイトル | ||||||
言語 | en | |||||
タイトル | Characteristics of SiO2/n-GaN interfaces with β-Ga2O3 interlayers | |||||
言語 | ||||||
言語 | eng | |||||
資源タイプ | ||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||
資源タイプ | journal article | |||||
著者 |
Nakano, Yoshitaka
× Nakano, Yoshitaka× Kachi, Tetsu× Jimbo, Takashi |
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著者別名 | ||||||
姓名 | 神保, 孝志 | |||||
書誌情報 |
APPLIED PHYSICS LETTERS 巻 83, 号 21, p. 4336-4338, 発行日 2003-11-24 |
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出版者 | ||||||
出版者 | American Institute of Physics | |||||
ISSN | ||||||
収録物識別子タイプ | ISSN | |||||
収録物識別子 | 00036951 | |||||
書誌レコードID(NCID) | ||||||
収録物識別子タイプ | NCID | |||||
収録物識別子 | AA00543432 | |||||
著者版フラグ | ||||||
出版タイプ | VoR | |||||
出版タイプResource | http://purl.org/coar/version/c_970fb48d4fbd8a85 | |||||
DOI | ||||||
関連タイプ | isIdenticalTo | |||||
識別子タイプ | DOI | |||||
関連識別子 | http://dx.doi.org/10.1063/1.1629371 | |||||
関連名称 | 10.1063/1.1629371 | |||||
内容記述 | ||||||
内容記述タイプ | Other | |||||
内容記述 | We report on the characteristics of SiO2/n-GaN metal-oxide-semiconductor (MOS) structures with β-Ga2O3 interlayers. β-Ga2O3 15 nm thick was grown by dry oxidation at 800°C for 6 h, and 100-nm-thick SiO2 was then deposited by sputtering. Capacitance-voltage measurements show a low interface trap density of ?3.9×1010eV-1cm-2, probably indicating an unpinning of the surface Fermi level. Additionally, current-voltage measurements display a low leakage current of ?1.2 μA/cm2 at a gate voltage of +20 V, regardless of rough oxide surface, as confirmed by atomic force microscopy observations. Thus, the stacked SiO2/β-Ga2O3 insulator is found to improve both the electrical interface properties and the gate dielectric characteristics of the GaN MOS structures. | |||||
フォーマット | ||||||
内容記述タイプ | Other | |||||
内容記述 | application/pdf |