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Input Entry Integration for an Auto-Memoization Processor
https://nitech.repo.nii.ac.jp/records/3469
https://nitech.repo.nii.ac.jp/records/3469fd048474-0431-46ae-95cb-819ce6601d46
| 名前 / ファイル | ライセンス | アクション |
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本文_fulltext (3.1 MB)
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(c)2011 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
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| Item type | 会議発表論文 / Conference Paper(1) | |||||||||||||||||
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| 公開日 | 2012-11-07 | |||||||||||||||||
| タイトル | ||||||||||||||||||
| タイトル | Input Entry Integration for an Auto-Memoization Processor | |||||||||||||||||
| 言語 | en | |||||||||||||||||
| 言語 | ||||||||||||||||||
| 言語 | eng | |||||||||||||||||
| 資源タイプ | ||||||||||||||||||
| 資源タイプ識別子 | http://purl.org/coar/resource_type/c_5794 | |||||||||||||||||
| 資源タイプ | conference paper | |||||||||||||||||
| 著者 |
Oda, Ryosuke
× Oda, Ryosuke
× Yamada, Tatsuhiro
× Ikegaya, Tomoki
× Tsumura, Tomoaki
× Matsuo, Hiroshi
× Nakashima, Yasuhiko
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| 著者別名 | ||||||||||||||||||
| 識別子Scheme | WEKO | |||||||||||||||||
| 識別子 | 8669 | |||||||||||||||||
| 識別子Scheme | NRID | |||||||||||||||||
| 識別子URI | http://rns.nii.ac.jp/nr/1000000335233 | |||||||||||||||||
| 識別子 | 1000000335233 | |||||||||||||||||
| 姓名 | 津邑, 公暁 | |||||||||||||||||
| 著者別名 | ||||||||||||||||||
| 識別子Scheme | WEKO | |||||||||||||||||
| 識別子 | 8515 | |||||||||||||||||
| 識別子Scheme | NRID | |||||||||||||||||
| 識別子URI | http://rns.nii.ac.jp/nr/1000000219396 | |||||||||||||||||
| 識別子 | 1000000219396 | |||||||||||||||||
| 姓名 | 松尾, 啓志 | |||||||||||||||||
| 書誌情報 |
en : Proc. of The 3rd Workshop on Ultra Performance and Dependable Acceleration Systems (UPDAS) p. 179-185, 発行日 2011-11-30 |
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| 出版者 | ||||||||||||||||||
| 出版者 | Institute of Electrical and Electronics Engineers | |||||||||||||||||
| 言語 | en | |||||||||||||||||
| 著者版フラグ | ||||||||||||||||||
| 出版タイプ | AM | |||||||||||||||||
| 出版タイプResource | http://purl.org/coar/version/c_ab4af688f83e57aa | |||||||||||||||||
| DOI | ||||||||||||||||||
| 関連タイプ | isVersionOf | |||||||||||||||||
| 識別子タイプ | DOI | |||||||||||||||||
| 関連識別子 | http://dx.doi.org/10.1109/ICNC.2011.34 | |||||||||||||||||
| 関連名称 | 10.1109/ICNC.2011.34 | |||||||||||||||||
| 内容記述 | ||||||||||||||||||
| 内容記述タイプ | Other | |||||||||||||||||
| 内容記述 | We have proposed an auto-memoization processor based on computation reuse. The table for registering inputs/outputs is implemented by a ternary CAM, and the input sequences are stored onto the table, being folded into tree forms. This paper proposes a new registration model for merging multiple input entries into a single entry. The new model can efficiently store input values and can reduce the search cost. The result of the experiment with SPEC CPU95 suite benchmarks shows that the new model improves the maximum speedup ratio from 40.5% to 50.0%, and the average speedup ratio from 10.5% to 16.4%. | |||||||||||||||||
| 言語 | en | |||||||||||||||||
